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SK hynix DRAM Product Planning Spearheads the Reminiscence Evolution within the Submit-HBM3 Period


By
Sungsoo Ryu, Head of DRAM Product Planning & Sunghak Lee, Technical Chief of In-Package deal Reminiscence (IPM) Product Planning 

07.27.2022

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Of their earlier EE Instances article, Sungsoo Ryu and Sunghak Lee, Head of SK hynix DRAM Product Planning and Technical Chief of SK hynix IPM Planning, defined how HBM3 helps to fulfill greater DRAM and reminiscence calls for. Teaming up for a second time, Ryu and Lee focus on how their groups match into SK hynix’s future plans.

Regardless of the continued debate over the validity of conventional ideas, together with Moore’s Regulation and reminiscence wall disparity, the final consensus within the semiconductor area is that the worth proposition of the reminiscence business over the course of the years have been for essentially the most half well-oriented to system-level necessities, serving to to raise system efficiency past present efficiency caps. Backed by research in superior applied sciences and options, the reminiscence business has dug deeper into the realm of the unknown and labored in the direction of back-to-back “world’s first” and “world’s greatest” improvements, bringing advantages to the IT sector as a complete.

Nonetheless, it’s turning into clearer that reminiscence efficiency progress, typically represented by reminiscence bandwidth, is reaching an inflection level as a consequence of rising doubts concerning the system-level sustainability of anticipated memory-level trade-offs, similar to energy, thermal and space overheads. This concern is greatest exemplified by the HBM business, which sits on the pinnacle of each the system and reminiscence efficiency hierarchy, and undisputed know-how drivers of next-generation functions, together with supercomputers, high-performance computing, autonomous driving and machine studying. Whereas reminiscence suppliers insist that sure ranges of energy, thermal and space prices are inevitable to safe the required efficient bandwidth efficiency, proponents of the system-on-chip (SoC) business argue that the extent of trade-offs needs to be maintained on the minimal contemplating fastened system-level budgets.

Determine 1. HBM Velocity vs. Energy Commerce-off Pattern

Such conflicting views have propelled the demand on either side for business management that might preemptively set tentative reminiscence roadmaps and know-how milestones as a beacon for higher reminiscence development visibility, in addition to drive business efforts to safe breakthrough options by shifting course from the normal evolutionary path to unconventional technique of defining new reminiscence structure and requirements. SK hynix, presently the undisputed chief of the HBM business, has set the tempo for profitable HBM product launches in recent times, because of the event of the first-of-its-kind HBM2E and HBM3 in 2019 and 2021, respectively, together with the current public announcement of HBM3 product shipments to NVIDIA.

On this side, the business is trying in the direction of SK hynix DRAM Product Planning to take the lead by initiating business collaboration and partnerships that can enable for future excessive bandwidth reminiscence roadmap deliveries aligned to the necessities of worldwide clients and companions primarily based on the world’s quickest and highest performing HBM line-ups. Answering such business calls, SK hynix DRAM Product Planning has set the tempo in the direction of pushing the HBM ecosystem to ship a brand new HBM line-up roughly each two years. SK hynix believes that the tentative two-year cadence roadmap will considerably contribute to sustaining the system-level developments and increasing present efficiency boundaries primarily based on the highest-value functions.

To take care of such long-term roadmap technique and technological developments, SK hynix DRAM Product Planning is driving each inner and exterior efforts to increase the set borderlines in HBM pace, density, energy and space. Before everything, to beat pace limitations, SK hynix is evaluating the professionals and cons of the normal technique of extending information charge per pin, in addition to the I/O bus width past x1024 for higher information parallelism and backward design compatibility; in different phrases, greater bandwidth efficiency with minimal trade-offs. To accommodate the upper reminiscence density necessities for larger information units and coaching workloads, SK hynix is initiating research on extending the variety of die stacks and the bodily stack peak, in addition to core die density elevated for an optimized stack density.

SK hynix can be pushing to enhance energy effectivity (pJ/bit), which is able to reduce absolutely the energy consumption per bandwidth extension by assessing reminiscence structure and operation schemes from the bottom micro-architectural stage up the best die stack idea. Understanding the significance of minimizing the whole reminiscence die dimension due the bodily limitations of the prevailing interposer reticle measurement and different related applied sciences that maintain each the processing unit in addition to HBM cubes, SK hynix is striving to protect these present bodily dimensions whereas concurrently rising the variety of cells and options that lead to total efficiency jumps. The premise of such duties is centered across the dedication of SK hynix to all HBM utilization extension past present programs to potential next-generation functions via joint partnerships and open collaboration with ecosystem companions.

Determine 2. HBM Efficiency Components

Alas, the talk continues on what the ultimate optimum efficiency targets are, safe breakthrough options that might fulfill all associated events, and what the suitable give-and-takes could be. These discussions are inevitable and must be resolved to ensure that the two-year HBM roadmap cadence to turn into a actuality.

Understanding the significance of co-operation and communication with associated events to take care of the driving efforts of the longer term roadmap technique and technological developments, SK hynix DRAM Product Planning is working extra carefully than earlier than with key SoC, ASIC (application-specific built-in circuit), CSP (cloud resolution supplier), OSAT (outsourced semiconductor meeting and check), foundry, PHY & IP and different companions to sort out present technical points whereas creating new vital values for not solely the semiconductor business progress itself, however within the side of tackling environmental and social values as a accountable know-how firm.

Determine 3. SK hynix’s Imaginative and prescient for HBM Open Collaboration Platform

Be taught extra.



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